Today I wrote my first little demo in @MyHDL. So far I like it more than @chiselhdl.. Thoughts / arguments / flame wars anyone?
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@oe1cxw I don't see how Chisel is a "higher level" HDL. Without behavioral modeling, it is much lower level than e.g. Verilog.
@jandecaluwe_en modelling is important, and from what I've seen from MyHDL so far I cant quite see myself using MyHDL for this kind [2/n]
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@oe1cxw are saying you can't use the flattened compiled design?@jandecaluwe_en commented, no structural limitation in the myhdl designThanks. Twitter will use this to make your timeline better. UndoUndo
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