@azonenberg Have you or @oe1cxw ever encountered Verilog code such as the following that breaks during simulation? http://stackoverflow.com/questions/15718192/verilog-sequence-of-non-blocking-assignments …
@cr1901 @azonenberg There is nothing nondeterministic about the value assigned to A. See my full answer: http://stackoverflow.com/questions/15718192/verilog-sequence-of-non-blocking-assignments/32753649#32753649 …
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@oe1cxw@azonenberg Thanks, this was bugging me immensely. I thought it would always work, but didn't know for certain.Thanks. Twitter will use this to make your timeline better. UndoUndo
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