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oe1cxw's profile
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩
@oe1cxw

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Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

@oe1cxw

Neurodiverse trans geek girl. Yosys, RISC-V, SAT/SMT.

She/her/hers
clairexen.net
Joined September 2014

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    Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 18 Feb 2015
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    Finally released my FPGA video pipeline for VGA / DVI / HDMI / OpenLDI / LVDS (open source under ISC license):https://github.com/cliffordwolf/SimpleVOut …

    10:01 AM - 18 Feb 2015
    • 8 Retweets
    • 11 Likes
    • andreas woess DarkHalfUK rc0r Fedor Sakharov azet Matijs van Zuijlen sys_kill kirk shoop Luke Darnell
    1 reply 8 retweets 11 likes
      1. New conversation
      1. Enjoy Digital‏ @enjoy_digital 18 Feb 2015
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        Replying to @oe1cxw

        @oe1cxw nice! Are you using Yosis for synthesis?

        2 replies 0 retweets 0 likes
      2. Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 18 Feb 2015
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        Replying to @enjoy_digital

        @enjoy_digital Haven't got the time to try yet. But I don't see a reason why it shouldn't work. It's on my todo list of course..

        0 replies 0 retweets 0 likes
        3. End of conversation

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