@asbradbury What tools/ip is @lowRISC using for asic physical implementation?
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Replying to @asbradbury
@asbradbury@lowRISC How is that an "open SoC"? I get the source code but the "compiler" is behind the gates of commercial#semiEDA1 reply 0 retweets 0 likes -
Replying to @asbradbury
@luked80@lowRISC a fully open 40nm/28nm ASIC flow isn't feasible atm, but see projects such as the excellent yosys from@oe1cxw1 reply 0 retweets 0 likes -
Replying to @asbradbury
@asbradbury@lowRISC@oe1cxw a project using magic, yosys and Qflow in larger geometries would be v. cool. I'd be lining up to buy & contrib1 reply 0 retweets 0 likes
Replying to @asbradbury
@asbradbury @luked80 @lowRISC cell lib and backend stuff (post GDSII OPC, etc.) are imho the biggest challenges for a fully open ASIC flow.
3:29 AM - 2 Feb 2015
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