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If you have used the Xilinx Vivado tools in the last year, did you use C/C++ HLS anywhere in a final design at all (i.e. not counting "just playing around"), or only Verilog/VHDL?
Thanks everyone for the data point. Context: Xilinx VP of Software Ramine Roane claimes at https://youtu.be/C-_PFbZw_Oo?t=340 … that 2/3 or 3/4 of Xilinx customers are using HLS.https://twitter.com/oe1cxw/status/1226110343824519170 …
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