It would be nice if we could have a RISC-V do-over that’s just an average, boring ISA, nothing weird or experimental.
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Not with shared libs where the mul func could just be mul insn on the more capable machine.
But yeah mul should just be in baseline ISA.
When you have a "shared lib" then the machines will also share a platform specs. You are effectively arguing that there should only exist one RISC-V platform spec, which you seem to equate with the base ISA spec. But those are different things.
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No, I'm not equating them. I'm saying the ISA spec should not interfere with ability to do good platform specs.
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It doesn't. A platform spec may require M when it makes sense. There's no reason to require M via the base ISA spec for platforms where it doesn't make sense. To require M via the base ISA spec would interfere with the ability to create good platform specs.
End of conversation
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