What I find most funny about ARM moving to allow custom ISA extensions is that in last year's "risc-v basics" smear campaign one of their main arguments against RISC-V was that it'd be unfathomably bad that RISC-V allows custom ISA extensions bc that would lead to fragmentation.
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They're necessary to implement synchronization between tasks, which is potentially useful in software on such cores, without a global sw ("kernel") helper. And the amount of logic needed for non-SMP implementation is utterly trivial.
There's nothing you'd need atomics for on an inherently non-smp platform. No matter how trivial the implementation would be, there's no reason to include it on non-smp platforms. Platform specs for platforms that may come in smp variants will certainly require A instructions.
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Yes there is. Atomics are just as important for non-SMP, to implement synchronization between tasks. Otherwise you need complex restart protocol mediated by scheduler.
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With non-smp platforms I mean platforms with only one core, not non-symmetric multicore platforms. Sorry, I should have been more clear. Let me rephrase: For platforms on which atomics make any sense whatsoever, the platform spec will require atomics.
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