What I find most funny about ARM moving to allow custom ISA extensions is that in last year's "risc-v basics" smear campaign one of their main arguments against RISC-V was that it'd be unfathomably bad that RISC-V allows custom ISA extensions bc that would lead to fragmentation.
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Atomics being optional is absolutely wrong. Non-SMP core can implement lr/sc trivially and should be required to. Likewise for mul but not quite as serious since it *can* be emulated in sw.
I disagree. Platform specs require A where it makes sense (such as Linux). There's nothing to gain from forcing tiny embedded cores for inherently non-smp platforms to implement mockup atomics.
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They're necessary to implement synchronization between tasks, which is potentially useful in software on such cores, without a global sw ("kernel") helper. And the amount of logic needed for non-SMP implementation is utterly trivial.
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There's nothing you'd need atomics for on an inherently non-smp platform. No matter how trivial the implementation would be, there's no reason to include it on non-smp platforms. Platform specs for platforms that may come in smp variants will certainly require A instructions.
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