Wait. Using perl to transform a design into SystemVerilog. Sounds painful.
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I have heard that there at some point was a proposal to add perl as an inline language to SystemVerilog which sounds like the most horrible thing ever. But yes, many of the big companies rely heavily on perl for preprocessing. More modern ones augment with python or similar
I've always had the theory that so much of the EDA world is stuck with TCL because "more modern language" usually means Perl in that industry and given that choice I'd take TCL every day.
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Oh, me too. It feels like tcl is a butter knife and perl is a rusty sword. None of them are very useful as a tool but there's less chance of hurting yourself with the former
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that my friend was a perfect analogy.
End of conversation
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