Verilog is a wonderful language because you find things like this in the standard (1364-2005 5.4.2) How can you write something like this and not go "wait, go back, we fucked up"pic.twitter.com/pUJnzHwRvG
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Unless a and b are 32 bits or larger
.. and then the behavior is implementation defined, because the std only says that unsized integer literals must be at least 32 bits in size.
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d'oh good point, that's even more exciting!
Thanks. Twitter will use this to make your timeline better. UndoUndo
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