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oe1cxw's profile
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩
@oe1cxw

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Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

@oe1cxw

Neurodiverse trans geek girl. Yosys, RISC-V, SAT/SMT.

She/her/hers
clairexen.net
Joined September 2014

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    1. whitequark‏ @whitequark 16 Jun 2019
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      whitequark Retweeted whitequark

      one day, when i have too much free time, i want to make a CPU that can run an OR1K process, a RISC-V process, and an ARMv7 process natively, and change its ISA on up to every context switchhttps://twitter.com/whitequark/status/1140295643996610560 …

      whitequark added,

      whitequark @whitequark
      has any CPU vendor ever made a viable prototype of a device that can change its microcode to adjust its ISA for many different languages? i.e. one process would run on a "Lisp machine" and the other on an "ALGOL machine". I can't seem to recall any, but am probably missing things
      Show this thread
      13 replies 16 retweets 101 likes
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      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 17 Jun 2019
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      Replying to @whitequark

      Extra points for adding support for the IBM System/360 ISA. (The first ISA for microcode-programmed systems.)

      3:59 AM - 17 Jun 2019
      • 4 Likes
      • sww1235 Juan Gonzalez whitequark RenéRebe™
      0 replies 0 retweets 4 likes

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