How?? Link? I've been toying with this exact idea in my head. Seems like a fun way to design a retro cpu. Next step would be "place and route" to kicad.
You could experiment with adding common combinations of gates from the same IC as library cells with slightly lower cost than the individual gates.
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See arithmetic mapping for FPGAs in Yosys for ideas for how to map to larger functions like adders.
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I remember
@trc_wm was talking about this. I imagine it's indeed quite essential to map to things like RAM, adders, DSPs, both for FPGA and 74xx. Where can I "see" this arithmetic mapping? A quick google doesn't turn up much. - Show replies
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Dan, fascinating work. I'm coming at a different angle, how to make practical processors using minimum number of TTL packages. I'm following the Gigatron TTL Computer
@gigatronTTL which offers colour video, sound & emulates the 6502 (10% speed) in just 34 TTL packages, ROM & RAM - Show replies
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