this is the sort of code that FPGA vendors provide in their technotes as the code you are expected to write. yes, with the mixed blocking and non-blocking assignment... (Lattice TN1250)pic.twitter.com/HtOjjiw3Qp
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Language guides are generally full of dubious, unsubstantiated, advise. Clifford's point provides the justification. FWIW, all (most?) my blocking assignment use have used it as local variable in the always block, like of a "let" in a functional language, which is fine IIUC.
Yes, that's an okay use and I do it myself in my own code. But I always feel bad about it because I know at one point someone who doesn't understand the subtleties of Verilog this well will work on that code and might introduce a "Heisenbug".
