Hey twitterettes, I'm looking for a logic optimization tool that can create the most efficient expression that maps an n-bit input to a 1-bit output by specifying which input vectors that produce 1,0 or are allowed to be either. It takes time to do many of those by hand on paper
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And i most cases it works fine. E.g. a j type instruction can be uniquely identified by opcode6=1,4=0,1=1. Or the second alu operand is rs2 when opcode bit5 is set (disregarding illegal instructions)
But wouldn't you want to optimize for an function with more than one output bit for insn decode and do everything in one big optimization task? This way you can share resources between the different insns.
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Yes, that's what I'm thinking too, but I haven't figured out how to let the verilog tools do that. But maybe I can put it all into one big-ass Quine/McCluskey thing and get all control signals in one go. Bonus points if it can find optimal place for pipeline regs too
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But then again, I'm not sure I'm ready to let s computer take over a task such as optimizing boolean expressions. It just feels like something humans do better :)
End of conversation
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