All gratuitously my opinion, YMMV, hope that helps.
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Thanks so much! I've looked at SMTCOMP results before but still been a bit lost. Good advice on sticking to smtlib format - I was lazy and the Python interface was tempting. But I've seen most of my workload turn to bitvector stuff so CVC4, Boolector and Yices seem worth trying.
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Replying to @geofflangdale @ciphernyx and
... honestly, at this stage, the best solver is nice, but community and documentation are important. I'm having a lot of trouble with the gap between "hi noob, want to solve Sudoku or find a De Bruijin sequence?" and scientific papers that assume I'm already a SMT researcher.
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Replying to @geofflangdale @ciphernyx and
As I've said before, I feel like one of those apes in 2001 poking the monolith with a stick whenever I use an SMT solver. Building a better mental model of how it works - preferably without having to ingest enough theory to become an SMT researcher in the process - would be nice.
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Replying to @geofflangdale @ciphernyx and
My best advice is to rewrite your query in every different way you can think to issue it, observe the often initially counter-intuitive performance differences, and A/B test your way to acceptable performance. I rewrote some 2KLOC queries 10+ times. Not ideal but builds intuition
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Replying to @RolfRolles @geofflangdale and
Some theory helps, too. E.g., the equality theory is one of the simpler ones. Try replacing every possible part of your query with an equality predicate of some sort. You might be shocked at the results... I was.
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Replying to @RolfRolles @geofflangdale and
Aggressively eliminate the more complex theories whenever possible. Using the array theory? Maybe you can get away with just the bitvector theory if you pose the query differently somehow.
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Replying to @RolfRolles @ciphernyx and
Thanks! I've been thinking of making arrays go away for one task that I'm modelling. Unfortunately, there's another task where I can't imagine how to do it without arrays (for those into that sort of thing, modelling the x86 instructions PEXT or PDEP and generating a const mask).
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Replying to @geofflangdale @RolfRolles and
Claire Xen 🏳️⚧️ 🏳️🌈 🧙🏻♀️ BLM 🏴 🚩 Retweeted Claire Xen 🏳️⚧️ 🏳️🌈 🧙🏻♀️ BLM 🏴 🚩
We need to compare notes on that one.https://twitter.com/oe1cxw/status/1050860235139817472 …
Claire Xen 🏳️⚧️ 🏳️🌈 🧙🏻♀️ BLM 🏴 🚩 added,
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Replying to @oe1cxw @geofflangdale and
One thing I have on my todo list is playing with the following: PEXT is a bwd butterfly circuit with pre-and-mask, PDEP a fwd butterfly circuit with post-and-mask. But those butterflies are more powerful than PEXT/PDEP.
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So maybe I can find an efficient way of constraint those butterfly control signals to only implement permutations that correlate to PEXT/PDEP. (This idea is based on the insights from http://palms.ee.princeton.edu/PALMSopen/hilewitz06FastBitCompression.pdf ….)
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Replying to @oe1cxw @geofflangdale and
What I do now is much less involved: I just generate outputs with bits in order, possibly interleaved with other junk. Then I know that a final PEXT exists that will "fix" the output. But I can't synthesize code that's using PEXT internally that way, just as last insn.
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