Yices : ever thought of a great idea, implemented it and then found you still couldn't beat another solver because they thought of it first? It was Yices that thought of it first.
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One thing I have on my todo list is playing with the following: PEXT is a bwd butterfly circuit with pre-and-mask, PDEP a fwd butterfly circuit with post-and-mask. But those butterflies are more powerful than PEXT/PDEP.
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So maybe I can find an efficient way of constraint those butterfly control signals to only implement permutations that correlate to PEXT/PDEP. (This idea is based on the insights from http://palms.ee.princeton.edu/PALMSopen/hilewitz06FastBitCompression.pdf ….)
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OK, so the butterfly idea is way ahead of mine. For PEXT/bext, I was imagining (pls don't laugh, I am SMT noob) that we'd generate an array with constraints dictating strictly ascending bits (obvs in the range of 0..bitwidth-1) and shift/extract the bits.
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I think that's a perfectly fine way of encoding PEXT if it's fast enough. I wouldn't use an array for that though. Simply use 32/64 individual variables. (Array abstraction only makes sense if you don't access all 2^N elements, otherwise just using 2^N individual vars is better.)
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If there is a copy of the notes going past I can have a look if that would help. The cost trade-off between hardware and SMT are different in subtle ways.
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