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oe1cxw's profile
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen 🏳️‍⚧️🏳️‍🌈🧙🏻‍♀️ BLM 🏴🚩
Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩
@oe1cxw

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Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩

@oe1cxw

Neurodiverse trans geek girl. Yosys, RISC-V, SAT/SMT.

She/her/hers
clairexen.net
Joined September 2014

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    1. Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 19 Sep 2018
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      As of this week I'm now officially the vice-chair of the RISC-V Bitmanipulation Task Group within the RISC-V Foundation. Many thanks to the people who made this possible. I am very excited about this opportunity. 🤓 🎉

      18 replies 18 retweets 184 likes
    2. Michael  🍊‏ @contramork 19 Sep 2018
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      Replying to @oe1cxw

      Congrats. I think your XBitmanip proposal is “excellent”. My only feedback is that can we have two profiles e.g. BStd and BAdv? There all are of the practical __builtin intrinsics or lifts that have immediate benefit (short term adoption in silicon) plus optional advanced insns.

      1 reply 0 retweets 1 like
    3. Geoff Langdale‏ @geofflangdale 20 Sep 2018
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      Replying to @contramork @oe1cxw

      Agreed. I have been bit-bashing for a long time and this is the most exciting proposal that I have ever seen. I very much hope that full 64-bit bext/bdep is implemented directly in hardware; there are a bunch of nice uses for this (I keep finding new uses for PEXT/PDEP on IA).

      2 replies 0 retweets 3 likes
    4. Geoff Langdale‏ @geofflangdale 20 Sep 2018
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      Replying to @geofflangdale @oe1cxw

      One question - is there carryless multiply anywhere in all this? ARM and x86 both have it. I can't see any mention in the main ISA doc or in this.

      1 reply 0 retweets 2 likes
    5. Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 20 Sep 2018
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      Replying to @geofflangdale

      I am trying to coordinate with the crypto extension people on this. My current thinking is that it would be a better fit there, but we will see. I fully agree that clmul should have a spot somewhere in the ISA.

      1 reply 0 retweets 2 likes
      Claire Xen  🏳️‍⚧️ 🏳️‍🌈 🧙🏻‍♀️ BLM  🏴 🚩‏ @oe1cxw 11 Oct 2018
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      Replying to @oe1cxw @geofflangdale

      Update: The crypto extension will likely be using vektor operations only. So my current thinking is to have scalar clmul/clmulh in the B extension and vector versions of those ops in the crypto extension.

      9:29 AM - 11 Oct 2018
      2 replies 0 retweets 0 likes
        1. Michael  🍊‏ @contramork 11 Oct 2018
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          Replying to @oe1cxw @geofflangdale

          I hope they test that approach with popular libraries. I know many will be VL=1 as typical open source codes are not designed for parallel crypto. e.g. a web server needs many streams for parallel crypto to work, but the popular APIs (OpenSSL) are typically single stream based.

          0 replies 0 retweets 1 like
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        1. Michael  🍊‏ @contramork 11 Oct 2018
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          Replying to @oe1cxw @geofflangdale

          Some algos like AES-GCM however handle parallelism on one stream. However CBC is still popular. It’s only of the only securable modes in earlier TLS versions.

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