As of this week I'm now officially the vice-chair of the RISC-V Bitmanipulation Task Group within the RISC-V Foundation.
Many thanks to the people who made this possible. I am very excited about this opportunity. 
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Agreed. I have been bit-bashing for a long time and this is the most exciting proposal that I have ever seen. I very much hope that full 64-bit bext/bdep is implemented directly in hardware; there are a bunch of nice uses for this (I keep finding new uses for PEXT/PDEP on IA).
Please feel free to add GitHub "issues" in the xbitmanip repo for any use cases you find worth sharing. The biggest "danger" to any instruction in the proposal is that we can't show enough good use cases.
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Yes. This is the frequency analysis. I agree many of the instructions like bext/bdep have a lot of potential applications but not wide use in practice because they are only arriving on commodity silicon (even though they have been on previous architectures like parisc).
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There is also the need for VBitManip. e.g. VPOPCNT for quantization on vectors, per lane then parallel sum, or whatever is required. I think if there is a BStd and BAdv, then BStd could have V equivalents. V regs could help with configuration state for arbitrary but permutations.
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I imagine that the crypto people can establish the need for clmul; this seems to be one of the instructions that crypto people want which is also more generally applicable (not one of those "here's our inner loop, suck it up, guys" type instructions).
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Yes CLMUL is essential. Also the question about how GF2 for 128-bit is done on RV64. The division between extension groups is interesting. Finite field field arithmetic is crypto/ecc. GF2 (CLMUL) is simple but wondered if the crypto folk were considering other prime fields.
End of conversation
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