Just confirmed: Xilinx's demo AXI slave peripheral is buggy. Don't you just love formal methods? 
They can't even hook up IP-XACT AXI components correctly.. https://forums.xilinx.com/t5/Embedded-Development-Tools/Bug-in-AXI-Interconnect-incorrect-ARBURST-default-value/m-p/540011 … (No idea if this has been fixed in the meantime, but knowing Xilinx I'd expect this still to be broken. I mean I've only posted that 5 years ago.. :)
