i am in awe of this PLL. absolute unit. just look at the jitter (please don't hit me i'll find a termination resistor somewhere i promise)pic.twitter.com/f3FLpPdDkH
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I think. the input clock isn't the best in the world either, I mean, 15 MHz on a breadboard
If that's really phase noise bleeding through the PLL from the input clock then tuning the loop filter parameters might help, trading lock time against stability. (But if you can see phase noise in time domain then the PLL is usually simply not locked.)
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Looks like not locked, yeah
Thanks. Twitter will use this to make your timeline better. UndoUndo
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If your input clock is messy then it isn't uncommon for a PLL (especially with default settings) to either not lock at all, or (worse) to sometimes lose lock. Some phase detectors are worse in this regard than others. Solution is usually the same: Tune filter parameters.
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But I'm sure you know all that. Tbh I'm just on twitter right now because I'm avoid some work, and tweeting about PLLs seems to work just fine for that purpose. :)
End of conversation
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