i am in awe of this PLL. absolute unit. just look at the jitter (please don't hit me i'll find a termination resistor somewhere i promise)pic.twitter.com/f3FLpPdDkH
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I think. the input clock isn't the best in the world either, I mean, 15 MHz on a breadboard
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If that's really phase noise bleeding through the PLL from the input clock then tuning the loop filter parameters might help, trading lock time against stability. (But if you can see phase noise in time domain then the PLL is usually simply not locked.)
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