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The rpi does it in the VC4 every 500ms. It actually causes a stall visible to userland, so there's a bootloader option to turn it off (disable_pvt).
Looks like they sped it up and got rid of it. The Tegra actually has a rather complicated process (since it all runs on code from RAM, it can't actually disable RAM) to stage the frequency changes and then run them on a hardware sequencer.https://github.com/raspberrypi/firmware/issues/640 …
There's also a ton of voodoo on the Tegra around calculating worst-case latency introduced by reclocking/retraining and ensuring the display pipeline has enough pixels buffered to ride through without an underrun on video scanout. Gets really messy with multiple planes etc.
The boot-time RAM training also runs entirely from the RAM that is being trained. It's all a big WTF. I have no idea why they just didn't have the BPMP run this from its dedicated SRAM. The contortions to make this work must be epic.
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