Hector Martin

Depends entirely on the target. Reset glitching and Vcc glitching are different things. One might work where the other one doesn't. With glitching you usually want to have very good timing control, though sometimes all it takes is tapping wires together.

This would be an AGB-CPU in 5V mode, though I discovered my ADC is 3.3V so it probably won't work too well :/

The goal here is to dump the AGB variant of the CGB boot ROM.

I've always been curious if the ARM switched bootroms in 5V mode to handle the stretching with L+R stuff. I think someone experimented with the software poke for switching to CGB and some GPU IO regs transferred over.

Yeah, I've been meaning to experiment with the CGB transition too. You can switch from AGB mode and configure a custom scaling matrix that gets used for the CGB screen. I really want to know if any interaction is possible between ARM code and 5V GB carts.

All the tests I've done to use ARM code on the 5V cartridges have failed. Even using a shin to prevent the GBA from rebooting into 5V mode yielded nothing but floating reads (and yes I used the SRAM range so signaling might actually work; the ROM range is a different protocol)

By floating reads you mean the usual open bus / prefetched instruction? Hmm. I wonder what a logic analyzer would say. Or if there might be some other address space range that can be used, or a magic bit somewhere.

Nah, open bus is on the address bits, not the data bits. It just so happens that ROM addressing uses both as the address and the address bits as the data bits as compared to the GB version.