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Fun fact: people like to say that unlike Flash memory, RAM can be read or written to one byte at a time, but that's a lie. A typical DIMM's memory array can only be addressed in 64KiB blocks! Writing one byte means reading 64K, modifying one byte, and writing 64K! (1/n)
In fact, *reading* is a destructive operation in RAM. Reading one byte means reading 64K (which destroys it), then writing back the 64K untouched! However, the RAM chips perform this read-write operation when directed, so the 64K doesn't have to go out via the bus and back. (2/n)
The difference is that RAM doesn't wear out, so nobody cares that it works this way. The RAM can also combine a long sequence of reads or writes, sequential or scattered, within one page, into one read, a sequence of I/Os, and a write back to the array. (3/n)
So next time someone tells you "RAM can be accessed at a granularity of one bit", remember that's not really true. It actually uses huge pages just like Flash, which is fundamental when memory is organized as a big 2D array (the page size is one dimension). (4/4)
Addendum: I meant 64 kibibits (64 Kibits or 64Kib) in my original tweet, not 64 kibibytes. It's usually something like 8 bits per chip × 8 chips = 64 bits for a whole DIMM, and pages (rows) are 1024 addresses within each bank, so 65536 bits.
64 kB, not 64bits, +/- some protocol issues?
KiB, KibiByte. RAM is addressed base2 not base10
Of course the actual numbers will be different for a lot of chips. But to get an idea about the complex architecture, one just has to look at a RAM chip datasheet, specifically the block diagram 
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https://www.micron.com/products/datasheets/3d323c4d-6bc7-4193-908d-e99ad746aa4e …pic.twitter.com/JLpox16lKI
This chip uses 4096 sense amps, and has a 4 bit output… a 64 bit read will be distributed over 16 chips and will indeed require 65536 individual bits to be read/written back in parallel.
Also to clarify this is DRAM. With SRAM you really can address individual units.
Correct. You pay 6 transistors per cell for that privilege (or 4 with some topologies).
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