Hector Martin

Intel's L4 cache / video RAM. Used on CPUs with Intel Iris graphics. Implemented on a second die sitting next to the CPU+GPU die itself.

to add to this, eDRAM is the name of the concept (z/196 also uses eDRAM, for example), rather than Intel's impl

Intel's implementation isn't even "real" eDRAM (though by some definitions it qualifies). It's a separate die. I was talking about actually having eDRAM on the same die as logic. That's been common on game consoles since PS2/GameCube, and recently it's used for cache on POWER.

All that is still moving the data, with ever larger busses. I'm wondering if we can get away with not actually moving it, something like making DRAM refresh "smart" or "streaming".

The thing is DRAM doesn't spend a huge fraction of the time refreshing itself. DRAM is pipelined and you can stream data in/out of RAM pretty much as fast as the physical technology allows.

Exactly! The streaming of data in and out _is the bottleneck_. So add compute when you are already processing the data anyway.

DDR4 & co move data about as fast as the actual underlying RAM allows (DRAM cells only go ~200-300Mhz)

There's some improvement you could make but mostly in the form of simple read modify write ops. The 360 had blending