one reason is the wafers that are good for storage (high gate capacitance) suck for computation, and vice versa
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Replying to @whitequark @mcclure111
Suck for computation at any serial scale. They can clearly compute a little, they do at line speed for ECC. How much more can they do?
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ECC? That's done by the memory controller, not the memory.
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Always? (This is a part of the architecture I don't know as well as I would like.)
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always. it doesn't make sense otherwise, the memory controller also must do scrambling and such
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How programmable ARE memory controllers?
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Replying to @dakami @whitequark and
The ones that are "programmable" give you control over signal timing, and the fanciest ones let you load a state machine to have more control over details of sending commands to the memory chips, but they aren't able to do any computation to speak of.
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The ECC calculation is generally hardwired, or there is a choice between a small number of hardwired ECC functions, e.g., one "chipkill" and one "normal" function.
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Stuff with encrypted memory tends to implement it at the memory controller level too. Usually in between L2 cache and the DRAM proper.
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Anything do encrypted RAM in widespread production?
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Xbox 360, Xbox One, iPhone (recent SEP models).
11:09 PM - 8 Dec 2017
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