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marcan42's profile
Hector Martin
Hector Martin
Hector Martin
@marcan42

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Hector Martin

@marcan42

If it ain't broke, I'll fix it! I'm porting Linux to Apple Silicon Macs at @AsahiLinux. http://patreon.com/marcan  | http://github.com/sponsors/marcan 

Tokyo, Japan
marcan.st
Joined May 2009

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    1. whitequark‏ @whitequark 5 Nov 2017
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      in all likelihood, there's a crowbar switch that routes the connector to either PCI-e or USB HCD, and HCD is only brought up when…

      3 replies 0 retweets 6 likes
      Show this thread
    2. whitequark‏ @whitequark 5 Nov 2017
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      the cable identifies itself as an USB cable (vs a Thunderbolt one)

      3 replies 0 retweets 5 likes
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    3. whitequark‏ @whitequark 5 Nov 2017
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      I verified that plugging a provably passive USB-C to USB-A cable also results in a new XHCI HCD being detected so @hikari_no_yume is right

      1 reply 0 retweets 6 likes
      Show this thread
    4. hikari, Kanbaru enthusiast  🌟 other Andrea‏ @hikari_no_yume 5 Nov 2017
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      Replying to @whitequark

      I'm slightly disappointed I'm right, because PCIe over mundane USB would be awesome …ly terrible for security, but

      1 reply 0 retweets 4 likes
    5. whitequark‏ @whitequark 5 Nov 2017
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      Replying to @hikari_no_yume

      it's impossible to meet PCI-e timing requirements

      2 replies 0 retweets 3 likes
    6. William D. Jones‏ @cr1901 5 Nov 2017
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      Replying to @whitequark @hikari_no_yume

      Latency issues?

      1 reply 0 retweets 0 likes
    7. hikari, Kanbaru enthusiast  🌟 other Andrea‏ @hikari_no_yume 5 Nov 2017
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      Replying to @cr1901 @whitequark

      IIRC PCIe has hard latency reqs, USB doesn't

      2 replies 0 retweets 1 like
    8. whitequark‏ @whitequark 5 Nov 2017
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      Replying to @hikari_no_yume @cr1901

      correct

      1 reply 0 retweets 1 like
    9. Thomas‏ @tpw_rules 5 Nov 2017
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      Replying to @whitequark @hikari_no_yume @cr1901

      What about @marcan42 pcie over RS232?

      1 reply 0 retweets 0 likes
    10. whitequark‏ @whitequark 5 Nov 2017
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      Replying to @tpw_rules @hikari_no_yume and

      that wasn't just PCIe, it also meddled with SoC clock, IIRC

      2 replies 0 retweets 0 likes
      Hector Martin‏ @marcan42 5 Nov 2017
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      Replying to @whitequark @tpw_rules and

      No, PCIe is actually extremely lenient with timings once you get to the TLP layer. Easy to meet with USB.

      8:55 PM - 5 Nov 2017
      • 2 Likes
      • 500 internal onee-chan error whitequark
      1 reply 0 retweets 2 likes
        1. New conversation
        1. Hector Martin‏ @marcan42 5 Nov 2017
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          Replying to @marcan42 @whitequark and

          IIRC timeouts are configurable but they tend to be very permissive on most systems by default.

          1 reply 0 retweets 2 likes
        2. Hector Martin‏ @marcan42 5 Nov 2017
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          Replying to @marcan42 @whitequark and

          Hector Martin Retweeted Hector Martin

          This was connecting to a totally unmodified Atom board, not even a PS4.https://twitter.com/marcan42/status/551574124284612608 …

          Hector Martin added,

          Hector Martin @marcan42
          PCIe device written in Python. Over serial-ASCII over USB. I'm amazed this even remotely works. pic.twitter.com/EUb5VsYTZl
          2 replies 0 retweets 4 likes
        3. Show replies

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