Hector Martin

@byuu_san might also be interested. Pretty sure you could simultaneously probe ~every bus on a SNES.

I think @gekkio might have something like this for the DMG.

Yeah my test bench is a simple version of something like this. 5V signals are annoying and are the reason why I don't use a beefy FPGA

One of these days I’ll lrn2fpga I swear

I have a small iCEStick or something like that that @gewt lent me that I’ve been planning to use for a DMG screen recording/key replay setup

Unfooooortunately I killed one of the lines for keys on the DMG I was toying with so I’ll need another one. B/Left are now permanently low!

Simple screen recording seems like a good first project for this. I want to investigate some stuff I saw on a DMG -> oscope setup:

The DMG turns off the dot clock while compositing OBJs onto the BG and during the SCX prefix, giving it extra time to do these operations.