Brainstorming an open FPGA breakout/devboard design with lots (>100) of I/O and USB. I should start writing a design doc soon...
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I'm trying to spec it so I can throw some PSRAM on and meet timing while holding a full 32MB of ROM data.
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@byuu_san might also be interested. Pretty sure you could simultaneously probe ~every bus on a SNES. - Show replies
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