FUD aside, I'm taking a look at the Intel DCI protocol (JTAG over USB3). Doesn't look very complicated. OpenOCD for Skylake anyone?pic.twitter.com/eXE5n4I00R
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my understanding is that the cpu has it enabled by default and mobo fw has to disable it.Not every vendor cares :-/
It's a PCH thing, not a CPU thing. I think it's a softstrap. Softstraps aren't publicly documented though.
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Softstrap = flag in flash ROM descriptor.
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Yeah, flag in flash is what I meant regarding fw. The thing is, I seriously doubt many vendors will remember to check it
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Given that it shows in cpuid, iirc, I thought it was CPU side... well, CPU complex definitely, since xHCI is on-die
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Pretty sure xHCI is not on-die. http://images.anandtech.com/doci/9483/Z170%20Platform.jpg …
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