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marcan42's profile
Hector Martin
Hector Martin
Hector Martin
@marcan42

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Hector Martin

@marcan42

If it ain't broke, I'll fix it! I'm porting Linux to Apple Silicon Macs at @AsahiLinux. http://patreon.com/marcan  | http://github.com/sponsors/marcan 

Tokyo, Japan
marcan.st
Joined May 2009

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    1. Bobo_PK‏ @Bobo_PK 16 Sep 2016
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      Replying to @marcan42

      well, it marked half the RAM as faling :-D

      1 reply 0 retweets 0 likes
    2. Hector Martin‏ @marcan42 16 Sep 2016
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      Replying to @Bobo_PK

      Oh it fucked up the vref_dq voltage alright. But what was it *supposed* to do? :D

      1 reply 0 retweets 1 like
    3. Pillow‏ @CounterPillow 16 Sep 2016
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      Replying to @marcan42 @Bobo_PK

      voltage regulator?

      1 reply 0 retweets 0 likes
    4. Hector Martin‏ @marcan42 16 Sep 2016
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      Replying to @CounterPillow @Bobo_PK

      No, that's the LM358 next to it buffering the 1/2Vdd...

      1 reply 0 retweets 1 like
    5. Bobo_PK‏ @Bobo_PK 16 Sep 2016
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      Replying to @marcan42

      wild, uneducated guess. Maybe it stored if the second RAM bank is active or not?

      1 reply 0 retweets 0 likes
    6. Hector Martin‏ @marcan42 16 Sep 2016
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      Replying to @Bobo_PK

      No. It has *something* to do with vref but I have no idea *what*. It was broken and thus actively messing with it.

      1 reply 0 retweets 0 likes
    7. Bernd Walter‏ @bwalter01 16 Sep 2016
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      Replying to @marcan42 @Bobo_PK

      Protection diodes maybe. Just guessing however.

      1 reply 0 retweets 0 likes
    8. Hector Martin‏ @marcan42 16 Sep 2016
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      Replying to @bwalter01 @Bobo_PK

      Doesn't make a lot of sense. Pinout was +3v3, GND, unk1, unk2, Vref, +1.5V. unk[12] were at 3.3V during normal operation

      2 replies 0 retweets 0 likes
    9. Bernd Walter‏ @bwalter01 16 Sep 2016
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      Replying to @marcan42 @Bobo_PK

      After some reading I wondered if it was a I2C DAC finetuning the voltage. But still doesn't make complete sense :-(

      1 reply 0 retweets 0 likes
    10. Bernd Walter‏ @bwalter01 16 Sep 2016
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      Replying to @bwalter01 @marcan42 @Bobo_PK

      No make no sense at all. The cap between the bottom left pins invalidates them as data lines. Must be some analog thingy.

      1 reply 0 retweets 0 likes
      Hector Martin‏ @marcan42 16 Sep 2016
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      Replying to @bwalter01 @Bobo_PK

      Pin 1 is bottom left (or I'm considering it that anyway). Those two lines are 3.3V and GND. Next two are the unknowns.

      7:12 PM - 16 Sep 2016
      1 reply 0 retweets 0 likes
        1. New conversation
        1. Bernd Walter‏ @bwalter01 16 Sep 2016
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          Replying to @marcan42 @Bobo_PK

          3.3 and GND explains the cap, but no direct connection to the plane? But the next two are connected via the 47R, right?

          2 replies 0 retweets 0 likes
        2. Bernd Walter‏ @bwalter01 16 Sep 2016
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          Replying to @bwalter01 @marcan42 @Bobo_PK

          It could be possible that this is the VTT regulator for the termination voltage.

          2 replies 0 retweets 0 likes
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