"Why is my I²C bus self-oscillating at 3MHz‽" (oh yeah and it's unrecoverable) Second lesson was that voltage regulators are 1-bit DRAM chips with ~1-2 minute data retention when powered off.
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If there's a lesson I learned with Glasgow, it's that transparent bidirectional level shifters of any kind are evil.
revA/B are broken for that reason (e.g. the I²C applet will never work), and revC0 pull-up support was broken because we used I²C-specific ones internally. 
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Thanks. Twitter will use this to make your timeline better. UndoUndo
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What's the technical reason for why they're bad?
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There's no actually way of building a transparent level shifter that magically knows what direction it has to drive in. They're based on tricks like weak bus keeper circuits with edge detectors and drivers improve performance, and those things make tons of assumptions.
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