And by the way, for the repairability folks: replaceable RAM on mobile devices is going away for good reason. Two SODIMMs is 128 bits of multi-GHz bus across multiple cm of board and a connector. That *eats* power. This isn't manufacturers being out to screw us, it's physics.
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Replying to @mutesplash
What *kind* of socket? Even if you do a CPU socket thing ($$$ and adds thickness) just making space for the thing plus the interconnect significantly increases total trace length. There's a reason why the M1 has ~0mm between the SoC die and the memory dies.
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Replying to @marcan42 @mutesplash
Makes sense, but how bad will 32GB RAM or more be? That must increase distance from the CPU, so how bad does performance per watt degrade?
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Replying to @Blaisorblade @mutesplash
We can stack lots of memory dies together these days. We'll see what Apple does there.
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But the immediately obvious answer here is that the M1 has two memory chips off to one side, and there's a whole other 3 sides they could put memory chips on :-)
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The floor plan has to be ready for that. The physical distance is not trivial so I doubt they would do that. You want the cache in between memory controller and the core, ideally.
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I'm thinking their next silicon, not the M1. I don't think they will be releasing 32G hardware with the M1.
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