So right now M1 wins on multithread Geekbench vs. a similar Ryzen, but loses on Cinebench, by significant margins either way. For any single benchmark, I would easily expect up to 50% noise in either direction at this stage. Don't try to extract more significant figures.
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So Apple straight up implemented the x86 consistency model on their cores. That's the kind of high-impact detail that makes or breaks emulation performance for a different arch. Did they do this for any other x86-isms? Nobody knows so far.
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Can you elaborate how they cheated their way? Super curious

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Read the next tweet? :-)
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I'm unsure what's cheating here.
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See the next tweet. Apple made the M1 able to switch to x86's consistency model. No other ARM chip can do that.
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