Speculation is OK! There just has to be a way to reset *all* microarchitectural state before starting a test run, so speculation happens the same way every time. For DDR, you’d have to define a worst-case # of cycles for an access, then artificially delay all accesses to that.https://twitter.com/rzidane360/status/1280737724916355072 …
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I see...
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Also, a bunch of these things are *temperature-dependent*. Though at least that factor you can usually derate to "worst case" without an order of magnitude performance difference.
End of conversation
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Yeah. It’s really tough to work around the big latency spikes from retraining etc.
Thanks. Twitter will use this to make your timeline better. UndoUndo
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