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Not on all architectures though. On PPC750CL, the CPU always reads whole cache lines from RAM first (at least with the settings used on the Wii), and Nintendo relied on this fact when they were too lazy to make the byte enables work in the PI<->MEM2 bridge.https://twitter.com/rygorous/status/1264418562845728768 …
The ARM926EJ-S Starlet on the other side wasn't so lucky, though, which is why memcpy/strcpy and friends on IOS are a massive hairball of workaround code to do manual read-modify-write and shift ops so it can copy unaligned buffers from MEM1 with only 32-bit word accesses!
And this is the anti-emulator protection in the non-public version of wiipax (used for HBC). We do byte writes to uncached mappings and exploit the unexpected behavior of clobbering the whole 64bit word.
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