Someone tried PCIe on the Raspberry Pi 4 already. Yes, the wiring job is horrible, and yes, of course it works, as I've said many times. Go hack on PCIe already, it's easier than you think. Now someone needs to stick a Radeon RX Vega on there, for kicks. http://mloduchowski.com/en/blog/raspberry-pi-4-b-pci-express/ …
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Replying to @marcan42
Thats super interesting. Also agree on the SI part. PCIe is only 100MHz which is reasonably resilient. IMO DDR is far more difficult than something like PCIe but even DDR3 is within the reach of hobbyists.
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Replying to @littlesteve
PCIe is not 100MHz, lol. The refclk is 100MHz, but PCIe 1.0 pushes 2.5 Gbaud over each lane (1.25 GHz bandwidth) and it goes up from there. But the PCIe PHY is amazing and can deal with a surprising amout of bullshit.
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Replying to @marcan42 @littlesteve
Yup. This mess of wires (probably a rather powerful unintentional emitter as well) actually reports 2.0 (5Gbps). I don't recall of the top of my head if PCIe 2.0 double the clock or the symbol density, though.
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Probably the clock if its still 8b/10b
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Impressive. I don't remember if we negotiated at PCIe 1.0 or 2.0 speeds for our PCIe-over-RS232 hack, not that it would've mattered :-)
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The fact that you can get it to negotiate over RS232 is amazing in itself. Which is hilarious because all the docs on the SoCs I work with suggest PCIe will fall over if you look at it wrong.
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There isn't really anything to negotiate at that layer, you just need to send replies fast enough for the TLP layer timeouts, and those are in the milliseconds range by default on the board/BIOS we had, so...
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ah fair enough. As I said I really don't know much about PCIe, I have little use for it with what I work on, although I'll probably have to start reading the specs soon.
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