OK, Thunderclap sounds pretty awesome. Bypassing IOMMU protections by emulating a trusted device and pushing the limits of memory regions you get access to. Technical details: https://thunderclap.io/
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The 5-gigabit transceivers have been supported since November. There is no hard PCIe in the ECP5, you get little more than the SERDES and 8b10b.
@whitequark has been working on a core:https://github.com/whitequark/Yumewatari …
Yup, this is the way to go. We used ECP3 and took a shorcut and hacked the Lattice evaluation IP instead to disable the config logic (not terribly hard if you know what you're doing, but obviously not releasable).
