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marcan42's profile
Hector Martin
Hector Martin
Hector Martin
@marcan42

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Hector Martin

@marcan42

If it ain't broke, I'll fix it! I'm porting Linux to Apple Silicon Macs at @AsahiLinux. http://patreon.com/marcan  | http://github.com/sponsors/marcan 

Tokyo, Japan
marcan.st
Joined May 2009

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    1. Hector Martin‏ @marcan42 3 Nov 2018
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      Replying to @TheKanter @jonmasters

      Rowhammer is Intel's fault too: they're largely the reason why desktop systems do not use ECC memory (because they market it as premium). It is utter insanity that at current DRAM densities we pretend memory is flawless. Every other storage tech has used ECC for decades.

      2 replies 0 retweets 7 likes
    2. Hector Martin‏ @marcan42 3 Nov 2018
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      Replying to @marcan42 @TheKanter @jonmasters

      (I know ECC as it exists today for DRAM does not completely mitigate rowhammer, but it certainly helps a lot)

      1 reply 0 retweets 0 likes
    3. Hector Martin‏ @marcan42 3 Nov 2018
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      Replying to @marcan42 @TheKanter @jonmasters

      Rowhammer has been solved, BTW. There are algorithms that can be used to proactively refresh vulnerable rows. Combined with faster refresh intervals, it's an effective mitigation.

      2 replies 0 retweets 0 likes
    4. Daniel Gruss‏ @lavados 3 Nov 2018
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      Replying to @marcan42 @TheKanter @jonmasters

      if you mean TRR, then, that is trivial to bypass (we did early this year) we even bypassed it while running with doubled refresh rate... so, maybe it is solved, but not the way you describe here ;)

      1 reply 0 retweets 2 likes
    5. David Kanter‏ @TheKanter 3 Nov 2018
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      Replying to @lavados @marcan42 @jonmasters

      Yeah I am not sure how we solve rowhammer within current economic constraints. Memory controller is probably the best place to do it.

      1 reply 0 retweets 1 like
    6. Daniel Gruss‏ @lavados 3 Nov 2018
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      Replying to @TheKanter @marcan42 @jonmasters

      Exactly what I've been talking about in quite a few of my talks this year: Rowhammer is an optimization problem. Similar for other HW/SW issues. We want computers to be fast, cheap, and reliable at the same time. Naturally we must run into edge cases from time to time.

      1 reply 1 retweet 1 like
    7. Hector Martin‏ @marcan42 3 Nov 2018
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      Replying to @lavados @TheKanter @jonmasters

      Right, we *understand* what causes the disturbances, so we can counter it. But you also need a backbone of ECC to at least have something against random errors and a chance at detecting targeted attacks even if you can't correct them.

      1 reply 0 retweets 1 like
    8. Daniel Gruss‏ @lavados 3 Nov 2018
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      Replying to @marcan42 @TheKanter @jonmasters

      We do not understand the effects well enough. Else we wouldn't come up with things like TRR. ECC is much more effective than TRR or any similar mechanism to refresh "nearby" rows. While surely possible, I've never seen any bit flip on ECC memory.

      1 reply 0 retweets 2 likes
    9. Hector Martin‏ @marcan42 3 Nov 2018
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      Replying to @lavados @TheKanter @jonmasters

      Something like ECC with a random seed (to make the syndromes unpredictable to an attacker) and a strong enough code should be enough to at least detect (if not correct) any targeted attacks before they can succeed in sneaking in a change that somehow passes ECC.

      1 reply 0 retweets 0 likes
    10. David Kanter‏ @TheKanter 3 Nov 2018
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      Replying to @marcan42 @lavados @jonmasters

      Random per thread? Per VM? Per what? Also look at Intel’s memory encryption.

      1 reply 0 retweets 0 likes
      Hector Martin‏ @marcan42 3 Nov 2018
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      Replying to @TheKanter @lavados @jonmasters

      Per boot is fine. Once you detect an attack you have corrupted memory and there is only so much you can do that isn't panic the system. It's a DoS but not a pwn. Memory encryption helps for the same reason, as long as it's system-wide and pervasive.

      10:58 AM - 3 Nov 2018
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