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marcan42's profile
Hector Martin
Hector Martin
Hector Martin
@marcan42

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Hector Martin

@marcan42

If it ain't broke, I'll fix it! I'm porting Linux to Apple Silicon Macs at @AsahiLinux. http://patreon.com/marcan  | http://github.com/sponsors/marcan 

Tokyo, Japan
marcan.st
Joined May 2009

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    1. Hector Martin‏ @marcan42 14 Sep 2018
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      What *I* want is hardware with exactly as much proprietary firmware to make it practical (and no more), where all of it is in /lib/firmware (or equivalent). No secret flash memories. I can mess and reverse engineer it all. This is the exact opposite of what the FSF encourages.

      1 reply 1 retweet 30 likes
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    2. Hector Martin‏ @marcan42 14 Sep 2018
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      Of course, you still want to be firewalled from devices using proprietary firmware wherever possible (in the form of interfaces that are secure, e.g. no free memory read/write from the blob), but that has nothing to do with not allowing the free side to send the blob over.

      1 reply 0 retweets 16 likes
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    3. Hector Martin‏ @marcan42 14 Sep 2018
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      But RYF instead says you must hide and bury any firmware you end up having to have. And so @Puri_sm end up having to do utter nonsense, like using a secondary CPU core to load the DDR4 controller firmware into the hardware, just so they can claim the binary blob is elsewhere.

      1 reply 0 retweets 21 likes
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    4. Hector Martin‏ @marcan42 14 Sep 2018
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      They store the blob on write-protected SPI flash (because users must not have the freedom to modify any firmware they do wind up running), and write some code for the secondary CPU just so that the main CPU doesn't get digital cooties from (eeeeeew) touching the DDR4 code.

      1 reply 0 retweets 19 likes
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    5. Hector Martin‏ @marcan42 14 Sep 2018
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      Keep in mind this isn't even about the secondary (or main) CPU *running* the firmware. The firmware is always run by an embedded processor in the DDR4 PHY anyway. This is just about having the main CPU never even *see* the firmware. See no evil, hear no evil, speak no evil.

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    6. Hector Martin‏ @marcan42 14 Sep 2018
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      So it doesn't matter that the DDR4 controller firmware has access to all RAM and obviously can pwn the main CPU at will. As long as you bury it in read-only memory, and make sure it never is accessed by the main CPU, the FSF will give your product their meaningless rubber stamp.

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    8. Robert Spigler  🔑‏ @RobertSpigler 16 Sep 2018
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      Replying to @psyburr @marcan42

      You're correct, it does not. A Libre Chromebook c201 however will have proprietary firmware on the HDD/SSD (just use FDE). Also, obviously, lacks hardware freedom, which is the lowest level of a computer.

      0 replies 0 retweets 1 like
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    10. Robert Spigler  🔑‏ @RobertSpigler 16 Sep 2018
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      Replying to @psyburr @marcan42

      I agree that its a really difficult choice - I happen to fall on the X200 side, but I don't think there's an objectively correct answer. My real hang up is that the C201 is a Google device.

      1 reply 0 retweets 1 like
      Hector Martin‏ @marcan42 16 Sep 2018
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      Replying to @RobertSpigler @psyburr

      Looks like the C201 uses DDR3 RAM. DDR4 is where stuff got complicated enough to require blobs that no manufacturer wants to open. E.g. the Chromebook Pixel's main boot chain is open *except* for the DDR4 training blob. It's going to get worse in the future.

      7:49 PM - 16 Sep 2018
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      • olddellian Robert Spigler 🔑 PsyBur
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        2. Hector Martin‏ @marcan42 16 Sep 2018
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          Replying to @marcan42 @RobertSpigler @psyburr

          Also, I commend Google for what they did with the Pixel. Every other Tegra X1 device has an entirely blob boot process, kernels highly divergent from mainline, etc. They managed to sponsor an alternate, completely open chain (everything after the Boot ROM).

          1 reply 0 retweets 1 like
        3. Hector Martin‏ @marcan42 16 Sep 2018
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          Replying to @marcan42 @RobertSpigler @psyburr

          The DDR4 MTC blob is stored as a separate file in CBFS and technically is "optional" - without it the RAM runs at slow 200MHz boot timings which cripples performance, but you *can* use it.

          1 reply 0 retweets 1 like
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        2. Robert Spigler  🔑‏ @RobertSpigler 16 Sep 2018
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          Replying to @marcan42 @psyburr

          Coming back to this now (messing up the flow), I'm confused. @RaptorEng @RaptorCompSys #TalosII has DDR4 EEC registered RAM, and they don't require a binary blob and this secondary processor exception.

          1 reply 0 retweets 1 like
        3. Hector Martin‏ @marcan42 16 Sep 2018
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          Replying to @RobertSpigler @psyburr and

          How do they do the DDR4 training? Is it actually open? Is it microcode? ROM? I'm not saying it's impossible, I'm saying it's complicated enough a lot of manufacturers are using blobs they refuse to open up, and it's getting worse.

          1 reply 0 retweets 1 like
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