What *I* want is hardware with exactly as much proprietary firmware to make it practical (and no more), where all of it is in /lib/firmware (or equivalent). No secret flash memories. I can mess and reverse engineer it all. This is the exact opposite of what the FSF encourages.
-
-
Also, I commend Google for what they did with the Pixel. Every other Tegra X1 device has an entirely blob boot process, kernels highly divergent from mainline, etc. They managed to sponsor an alternate, completely open chain (everything after the Boot ROM).
-
The DDR4 MTC blob is stored as a separate file in CBFS and technically is "optional" - without it the RAM runs at slow 200MHz boot timings which cripples performance, but you *can* use it.
- Show replies
New conversation -
-
-
Coming back to this now (messing up the flow), I'm confused.
@RaptorEng@RaptorCompSys#TalosII has DDR4 EEC registered RAM, and they don't require a binary blob and this secondary processor exception. -
How do they do the DDR4 training? Is it actually open? Is it microcode? ROM? I'm not saying it's impossible, I'm saying it's complicated enough a lot of manufacturers are using blobs they refuse to open up, and it's getting worse.
- Show replies
New conversation -
Loading seems to be taking a while.
Twitter may be over capacity or experiencing a momentary hiccup. Try again or visit Twitter Status for more information.