@0xabad1dea it's pixel perfect now https://i.imgur.com/8bl5VZL.gif
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on the FPGA, which causes protocol desynchronization, which causes glitches to be displayed." (different glitches than previous ones, *those* were due to setup/hold violations due to a particular way I laid out the logic on the FPGA.)
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The LCD interface *does* have something to do with sprites. IIRC, on GB/GBC, the display clock is *not* constant. It actually stops drawing pixels for a few clocks when switching between sprites/BG.
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Yeah, the pixels internally are buffered in a FIFO, which can be invalidated, causing a stall on the output until it's filled in again.
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oooh, that explains things. I do use the device clock, but variations in it will change how -my- FIFO buffer fills
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