OSS FPGA & EDA tools

@ico_TC

personal tweets about state of Open Source FPGA tools, Yosys, nextpnr, formal methods.

Austria, Europe, World
Vrijeme pridruživanja: siječanj 2016.

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  1. Prikvačeni tweet
    18. lis 2018.

    Open source FPGA tools? Start to become a reality for makers and researchers.

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  2. proslijedio/la je Tweet
    prije 6 sati

    RT : 's work on porting gr-osmosdr's to Qt and python 3 is now in the gr3.8 branch of Please test and report. If no blockers are found, this branch will become the new master and first tagged release with 3.8 support.

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  3. proslijedio/la je Tweet
    prije 22 sata

    HydraNFC v2 AutoTuning with latest modifications provide amazing results reading ISO14443A Tags at more than 12cm and Reading ISO15693/Vicinity Tags at more than 16cm with default Antenna (Credit Card Size) Note: Small Batch shall be available in March 2020 stay tuned

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  4. proslijedio/la je Tweet
    2. velj

    Alright, baseline is up and running: booted provided prebuilt bitstream and images! Small tweak to lxterm needed, will prepare patch while I travel.

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  5. proslijedio/la je Tweet
    1. velj
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  6. proslijedio/la je Tweet
    1. velj

    Smoke test passes, and a quick test with the GreatFET puts it into RX mode successfully 🙂

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  7. proslijedio/la je Tweet
    31. sij

    I've added support for ECP5 5G in . Tested with Lattice ECP5 5G Evaluation Board and examples ecp5_evn and soc_ecp5_evn from . 🥳

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  8. proslijedio/la je Tweet
    31. sij
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  9. proslijedio/la je Tweet
    29. sij

    Not that it's recommended, or endorsed, or even maybe a good idea, but remember, Arista switches are really just Linux boxes with really fancy Ethernet NICs attached to their PCIe bus, so if you wanted to do something like add more RAM, you could do it...

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  10. proslijedio/la je Tweet
    31. sij

    Still, it was easier than the first time I read the Armv8 specs back in 2011/12. That was only allowed in one room in Cambridge UK and I wasn’t able to take anything in or out except what was in my head

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  11. proslijedio/la je Tweet
    31. sij
    Odgovor korisniku/ci

    The typical trajectory of this conversation is "How do I find out what businesses will pay for?" "Talk to *many* business owners and find out!". But there's rarely an explanation of how to get business owners to talk to you as an individual. Do you have such an explanation?

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  12. proslijedio/la je Tweet
    31. sij

    At your requests, integration with Github Actions! 🚀 Build, test, inspect, and deploy your PlatformIO projects right from GitHub! 👉 📌

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  13. proslijedio/la je Tweet
    31. sij

    Master's Thesis using Open Source FPGA tools. Congratulations ! Hope to see more and more usage of these tools both in academic and professional contexts. cc

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  14. proslijedio/la je Tweet
    30. sij

    Avanzando con los plugins en , casi tenemos ya un terminal serie! testando la comunicación serie con los ejemplos de y la colección stdio

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  15. 30. sij

    What would it take to accelerate PyTorch solutions with FPGAs?

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  16. proslijedio/la je Tweet
    30. sij

    The RISC-V ISA is attracting attention across a wide swath of markets, but making sure devices based on the ISA work as expected is proving as hard, if not harder, than other commercially available ISA-based chips.

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  17. 30. sij

    What did Xerox management say when a Xerox engineer presented to them the first laserprinter?

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  18. 30. sij

    What did

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  19. 30. sij

    You can learn how to write DSP functionality in Verilog by using gr-verilog in Gnuradio. No hardware needed.

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  20. proslijedio/la je Tweet
    29. sij

    Listening to talk about improving Verilog generation in at the Chisel Community Conference.

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  21. proslijedio/la je Tweet

    If you want a fun example of how standards people are often completely disconnected from reality, the DAB digital radio specification includes an entire section on delivering Java applets over digital radio. Not a single product ever implemented it.

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