Rezultati pretraživanja
  1. 27. sij

    Cool video on nMigen & yosys-nextpnr in action: "Building an 6800 CPU on an FPGA with nMigen" by Robert Baruch I like how he shows the dead ends in the process, and explains a lot of what's going on.

  2. 25. ožu 2019.

    Been working with recently, and have found a work-flow that allows me to integrate Yosys-style formal verification into my designs. I'm pleased with the results so far, and it's not too onerous.

    Prikaži ovu nit
  3. 13. sij

    Robert Baruch builds a 6800 cpu with , up to 9 parts so far.

  4. 22. stu 2019.

    Presenting "HDL workflow in python" at . i talked about and workflow and how it improves our development process. Presentation and material here

  5. 28. sij 2019.

    T317) Downtime during the Lunar New Year? Tired of and ? Use the toolbox to build complex mining hardware and hack on the 32-bit RISC-V Soft Processor out now:

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