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danluu's profile
Dan Luu
Dan Luu
Dan Luu
@danluu

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Dan Luu

@danluu

https://patreon.com/danluu 

danluu.com
Joined December 2008

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    Dan Luu‏ @danluu 27 Nov 2015
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    Why ECC? 6% fail rate w/16GB. Error distribution shows plenty of box w/100+ errors per month http://danluu.com/why-ecc/ pic.twitter.com/PLuTvCvqr0

    9:31 AM - 27 Nov 2015
    • 72 Retweets
    • 86 Likes
    • Christian Langreiter Norman (((has a toaster))) WilsonⓂ️ likuku Vikram Shukla Avi Freedman Joshua Conner Miguel Filipe Miss Amy Nahum Shalman
    4 replies 72 retweets 86 likes
      1. New conversation
      2. Dan Luu‏ @danluu 25 Apr 2017
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        Note that the number is 6% of machines, so your machine is very likely to be fine. And all of Gary's explanations are true, too.

        1 reply 0 retweets 1 like
      3. Dan Luu‏ @danluu 25 Apr 2017
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        Replying to @danluu @garybernhardt

        I used to work at a co with 1k physical machines and we saw lots of data corruption, some segfaults, consistent with the numbers above.

        1 reply 1 retweet 3 likes
      4. 2 more replies
      1. New conversation
      2. Dan Luu‏ @danluu 25 Apr 2017
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        Replying to @garybernhardt

        I think that's a side-effect of working on CPUs: simulator bugs are potentially disastrous, so you track/classify all failures

        1 reply 0 retweets 1 like
      3. Dan Luu‏ @danluu 25 Apr 2017
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        Replying to @danluu @garybernhardt

        And since you spend all day staring at bits anyway, looking at bits in memory is a pretty natural thing to do.

        0 replies 0 retweets 0 likes
      4. End of conversation
      1. New conversation
      2. Dan Luu‏ @danluu 25 Apr 2017
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        BTW the background here is that 95% of mem in maybe 80% of machines is checking a software model vs. hardware "RTL" (code).

        1 reply 0 retweets 0 likes
      3. Dan Luu‏ @danluu 25 Apr 2017
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        Replying to @danluu @garybernhardt

        Data corruption is likely to show up as some kind of test failure because it's unlikely that a bit flips to match the other model.

        1 reply 0 retweets 0 likes
      4. 1 more reply
      1. Dan Luu‏ @danluu 25 Apr 2017
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        When we looked at segfaults, they would often obv. be from corruption (e.g., load addr into reg, deference, faulting address has 1bit flip).

        0 replies 0 retweets 0 likes
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      1. New conversation
      2. Dan Luu‏ @danluu 27 Nov 2015
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        Replying to @danluu

        BTW, your desktop and laptop most likely don't have ECC. How lucky are you feeling today?

        2 replies 2 retweets 7 likes
      3. Noel Welsh‏ @noelwelsh 27 Nov 2015
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        Replying to @danluu

        @danluu eight bits or just the seven? Do you feel lucky, punk?

        0 replies 0 retweets 0 likes
      4. End of conversation
      1. New conversation
      2. Andrew Warfield‏ @andywarfield 27 Nov 2015
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        Replying to @danluu

        @danluu Very much looking forward to the ARM/POWER unsuitability rant...

        1 reply 0 retweets 0 likes
      3. Dan Luu‏ @danluu 27 Nov 2015
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        Replying to @andywarfield

        @andywarfield Trying to decide if I should wait for rtrment before I pen that,but if in Seattle let me buy you a beer and talk your ear off.

        1 reply 0 retweets 0 likes
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