@solardiz @4Dgifts @ortegaalfredo @cynicalsecurity @TheKanter @byterazor Very hard to sneak in, since it's a different manuf. process.
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Replying to @danluu
@solardiz@4Dgifts@ortegaalfredo@cynicalsecurity@TheKanter@byterazor However, it's common to build mini-logic analyzers in for si debug2 replies 1 retweet 0 likes -
Replying to @danluu
@danluu@solardiz@4Dgifts@ortegaalfredo@cynicalsecurity@byterazor intel has a full-blown logic analyzer for the on-chip fabric3 replies 2 retweets 1 like -
Replying to @TheKanter
@TheKanter@danluu@4Dgifts@ortegaalfredo@cynicalsecurity@byterazor Any way we can access such in-CPU logic analyzers from our software?1 reply 1 retweet 0 likes -
Replying to @solardiz
@solardiz@TheKanter@4Dgifts@ortegaalfredo@cynicalsecurity@byterazor In all cases that I know of, you'd have to reverse engineer access1 reply 1 retweet 0 likes -
Replying to @danluu
@solardiz@TheKanter@4Dgifts@ortegaalfredo@cynicalsecurity@byterazor Not sure how, since unlike K8 case, you won't have ptrs in binaries1 reply 1 retweet 0 likes -
Replying to @danluu
@solardiz@TheKanter@4Dgifts@ortegaalfredo@cynicalsecurity@byterazor unless you dig through trash HDs from post-si debug lab or somethin1 reply 0 retweets 0 likes -
Replying to @danluu
@danluu@solardiz@4Dgifts@ortegaalfredo@cynicalsecurity@byterazor most post-Si debug tools are for vendors only; unclear if partners1 reply 0 retweets 0 likes -
Replying to @TheKanter
@danluu@solardiz@4Dgifts@ortegaalfredo@cynicalsecurity@byterazor ...if partners have access2 replies 0 retweets 0 likes -
Replying to @TheKanter
@TheKanter@solardiz@4Dgifts@ortegaalfredo@cynicalsecurity@byterazor Is it possible to rev eng logic from deprocessing a chip nowadays?2 replies 0 retweets 0 likes
@TheKanter @solardiz @4Dgifts @ortegaalfredo @cynicalsecurity @byterazor If so, it must be $$$. Out of reach of individuals.
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