@danluu Well, it might be simpler to "knock" with a sequence of "add" operands. PMUs are the proof you can track this without overhead.
Are CPU backdoors possible? What would one look like? http://danluu.com/cpu-backdoors/
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@shipilev Oh, good point. I mentioned using debug logic, but of course the publicly exposed perf counters give you lots of stuff already! - 3 more replies
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@danluu There's a lot of room for backdoors on x86 wrt "ignored" inst prefixes. Probably microcodable, but can't coerce a JIT to generate. -
@_rsc Yeah, I thought about mentioning that (should have, probably), but didn't since it would be hard to microcode patch in without - 1 more reply
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@SuperWinona I didn't! Thanks for the pointer! I'll read it and (probably) add a link to it in the post after I've read it.
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@danluu I am aware of at least one backdoor to an older CPU -
@TheKanter@danluu What's that one older CPU backdoor you're aware of? Can you tell us? - 17 more replies
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@danluu mine look like this (see https://github.com/Groundworkstech/submicron …)pic.twitter.com/apnozXNNCK
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@danluu SMM trigger on IO r/w is used to emulate legacy KBD i/f for USB. Could easily trigger SMM off undocumented, unused io/mem addrsThanks. Twitter will use this to make your timeline better. UndoUndo
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