If by under load you mean not overclocked but under load. And as I'm sure you know, there was a fairly serious CPU correctness bug found by your employer during that timeframe, unsurprisingly against a whitelisted vendor.
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There are tens to hundreds of errata like this for a modern Intel CPU. When you say that NaCl depends on a limited subset of features, are you saying this subset of features does not include having correct values in registers, memory, flags, etc.?
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Because NaCl code isn't arbitrary, it has to follow certain rules so that it can be validated. If an errata requires a specific code sequence, and that code sequence is impossible to validate, then please explain how it's relevant.
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In the case of the bug you linked to earlier, the full phrase is "which may occur under complex microarchitectural conditions involving jump instructions that span 64-byte boundaries (cross cache lines)", which does tell you how to avoid it.
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It was an example. If you search for "complex microarchitectural conditions" you can find plenty that don't have a reasonable software workaround (other than a ucode patch), the first document I found when searching for that has multiple examples.
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