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danluu's profile
Dan Luu
Dan Luu
Dan Luu
@danluu

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Dan Luu

@danluu

https://patreon.com/danluu 

danluu.com
Joined December 2008

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    1. Dan Luu‏ @danluu 8 Dec 2019
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      Replying to @danluu @taviso @chort0

      Ok, so now you've tested maybe 10 chips from 10 different models of Intel chips and none fail in this way, well that's the expected outcome, what does that tell you about another model from Intel? Same thing it tells you about a Transmeta chip you didn't test.

      1 reply 0 retweets 2 likes
    2. Dan Luu‏ @danluu 8 Dec 2019
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      Replying to @danluu @taviso @chort0

      Some a priori knowledge you have is that Intel has * high complexity in their chips compared to every non-white listed vendor * cut back on verification effort in the past decade So even after all that testing, you should still expect a greater chance of funny failures on Intel.

      1 reply 0 retweets 1 like
    3. Dan Luu‏ @danluu 8 Dec 2019
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      Replying to @danluu @taviso @chort0

      Someone who's following along on this discussion pointed out https://www.intel.com/content/www/us/en/support/articles/000055650/processors.html …, this isn't the only time Intel has had a bug like this. You couldn't even get a bug like this on a Centaur chip, the logic isn't sophisticated enough.

      1 reply 0 retweets 3 likes
    4. Dan Luu‏ @danluu 8 Dec 2019
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      Replying to @danluu @taviso @chort0

      So after testing 1k chips from Intel, what do you know? If you have some knowledge of CPU internals and talk to Intel verification folks, your prior (IMO) should still be that they're the most likely to have this kind of issue.

      1 reply 0 retweets 0 likes
    5. Tavis Ormandy‏Verified account @taviso 8 Dec 2019
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      Replying to @danluu @chort0

      After testing 1k chips, if all 1k failed under load, I would say we need to insist on a more specific cpuid whitelist, maybe consider design changes, and get feedback from the vendor? I really think this is pretty reasonable.

      1 reply 0 retweets 0 likes
    6. Dan Luu‏ @danluu 8 Dec 2019
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      Replying to @taviso @chort0

      If 1k out of 1k failed under load, the chip never would've shipped in the first place, you're never going to see that. The linked bug is contemporary with the NaCl thread. How come the CPU vendor *most likely to have issues like the one you describe* is one of two whitelisted?

      1 reply 0 retweets 2 likes
    7. Dan Luu‏ @danluu 8 Dec 2019
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      Replying to @danluu @taviso @chort0

      If by under load you mean not overclocked but under load. And as I'm sure you know, there was a fairly serious CPU correctness bug found by your employer during that timeframe, unsurprisingly against a whitelisted vendor.

      1 reply 0 retweets 0 likes
    8. Tavis Ormandy‏Verified account @taviso 8 Dec 2019
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      Replying to @danluu @chort0

      What percentage of chips couldn't handle lock cmpxchg8b eax? We're not talking about well formed code, we're talking about adversarial code from the web, designed to trigger edge cases or exercise obscure parts of the spec. Not sure spectre was relevant to NaCl, rowhammer was.

      1 reply 0 retweets 0 likes
    9. Dan Luu‏ @danluu 8 Dec 2019
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      Replying to @taviso @chort0

      what percentage of Intel chips or banned Centaur chips? I'm not saying that chips never fail, I'm just saying that your whitelisted vendors have the most complex and therefore the most likely to fail chips and this is what we've seen in practice.

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    10. Tavis Ormandy‏Verified account @taviso 8 Dec 2019
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      Replying to @danluu @chort0

      NaCl only depends on a small subset of the operation for security. Not sure why you keep talking about Spectre/Meltdown, it wasn't really relevant to NaCl (wasn't a free breakout, and you didn't need NaCl to exploit it, but rowhammer was).

      1 reply 0 retweets 0 likes
      Dan Luu‏ @danluu 8 Dec 2019
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      Replying to @taviso @chort0

      Who keeps bringing it up? You, not me.

      4:58 PM - 8 Dec 2019
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