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one day, when i have too much free time, i want to make a CPU that can run an OR1K process, a RISC-V process, and an ARMv7 process natively, and change its ISA on up to every context switchhttps://twitter.com/whitequark/status/1140295643996610560 …
Centaur did something vaguely like this for x86 & ARM, partially documented in some patents. The usual reasons to avoid reading patents apply to this, but if you're curious, here's one of the related patents: https://patents.justia.com/patent/9898291
hang on. before I read that, what would be the usual reasons to avoid reading patents. I don't... normally avoid them?
My employers have always advised me to avoid reading patents since knowingly infringing on patents results in 3x damages. This may not be relevant if you're messing around on personal projects.
I think what Centaur did was different from what you're proposing since Centaur had fixed decoders for each supported ISA instead of a re-configurable decoder, but they still had to solve a lot of the problems you'll run into with supporting multiple ISAs.
thanks, very interesting read indeed. I feel like a reconfigurable decoder would require solving quite a few problems on top of that, and would be the most interesting slash most likely to critically fail part of the project
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