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danluu's profile
Dan Luu
Dan Luu
Dan Luu
@danluu

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Dan Luu

@danluu

https://patreon.com/danluu 

danluu.com
Joined December 2008

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    1. Dan Kaminsky‏Verified account @dakami 19 May 2019
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      I’m curious — are there structural differences in the ISA itself hypothesized to make ARM ultimately more power efficient than x86? I just bumped into the concept that certain instructions can have a heavier “power license” that can slow down an entire core or even socket, so?

      5 replies 3 retweets 15 likes
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    2. Ben Lichtman‏ @lichtman_ben 20 May 2019
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      Replying to @dakami

      I think it comes down more to complexity - on x86 there is an additional layer of abstraction under the instructions themselves - they have to be decoded into uOPs which has a resource overhead, whereas in ARM you don’t need to have as much support hardware just to execute.

      1 reply 0 retweets 1 like
    3. Dan Kaminsky‏Verified account @dakami 20 May 2019
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      Replying to @lichtman_ben

      Is it still true that ARM64 is directly executed? Does x86 spend a lot of time doing this?

      1 reply 0 retweets 0 likes
    4. Ben Lichtman‏ @lichtman_ben 20 May 2019
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      Replying to @dakami

      AFAIK some of the more complex ARM cores use uOPs however the decode pipeline is far less complicated (I don’t know the ins and outs of arm though so better double check me)

      1 reply 0 retweets 1 like
    5. Dan Kaminsky‏Verified account @dakami 20 May 2019
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      Replying to @lichtman_ben

      Do instruction caches cover uOPs or incoming bytestreams, sizewise?

      1 reply 0 retweets 0 likes
    6. Ben Lichtman‏ @lichtman_ben 20 May 2019
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      Replying to @dakami

      I couldn’t say with certainty, best to ask an expert

      1 reply 0 retweets 0 likes
    7. Dan Kaminsky‏Verified account @dakami 20 May 2019
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      Replying to @lichtman_ben

      Heh @danluu — thoughts? Curious about “intrinsic” x86 vs arm advantages given 2019 CPU microarchitecture trends.

      1 reply 0 retweets 0 likes
    8. Dan Luu‏ @danluu 20 May 2019
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      Replying to @dakami @lichtman_ben

      I only seriously studied this for ARMv7, haven't really looked into ARMv8, but I'd expect this to be a relatively small impact relative to other factors, at least for "high performance" chips (including chips used in high-end cell phones as "high performance".

      1 reply 0 retweets 2 likes
    9. Dan Luu‏ @danluu 20 May 2019
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      Replying to @danluu @dakami @lichtman_ben

      When we implemented an ARMv7 decoder, it was larger than our x86 decoder. This is a little unfair, since the decoder would've been smaller if our backend had originally been designed for ARM, but ARMv7 has a bunch of gross stuff that's not trivial to handle regardless of backend.

      1 reply 0 retweets 2 likes
    10. Dan Luu‏ @danluu 20 May 2019
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      Replying to @danluu @dakami @lichtman_ben

      I believe a lot of that stuff is gone in ARMv8, but people don't really talk about the ARMv7 penalty the way people talk about the x86 penalty even though I think these two things aren't really so different, so I think it's mostly cultural that people say this about x86.

      1 reply 0 retweets 1 like
      Dan Luu‏ @danluu 20 May 2019
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      Replying to @danluu @dakami @lichtman_ben

      I'm not saying you can't do better than x86. You can do better. But if I were trying to make a low power chip with at-least iPhone performance, x86 or not would be the low order bit behind having a good micro-arch, making sure we have good circuit designers, etc.

      9:36 PM - 20 May 2019
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      1 reply 0 retweets 2 likes
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        2. Ben Lichtman‏ @lichtman_ben 20 May 2019
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          Replying to @danluu @dakami

          Do you think there is a future for risc V in the mobile space or otherwise?

          1 reply 0 retweets 1 like
        3. Dan Luu‏ @danluu 20 May 2019
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          Replying to @lichtman_ben @dakami

          IDK, I think that's more of a business question than a technical question and I have no particular insight into the business side of things. IMO, the technical side is almost irrelevant in terms of whether or not RISC-V will be a successful ISA.

          1 reply 0 retweets 2 likes
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